We're disrupting the traditional performance, cost, and efficiency curves of the semiconductor and computing industries by driving a 1000x improvement in interconnect bandwidth density at 10x lower power. Our patented approach uses industry-standard cost-effective silicon processing techniques to develop high speed, high density, low power optical-based interconnect “chiplets” and multi-wavelength lasers to replace traditional electrical-based I/O.

Great leadership team. innovative products to work on!
Great base salary/equity options
Hybrid schedule
Unlimited PTO

Hybrid in Santa Clara California, Portland Oregon, or Boston Massachusetts.
DFT Verification, working on simulations for ASIC's- Verilog, RTL, System Verilog
Mentor or Cadence, ATPG, and BIST- both preferred.