Principal Design Verification Engineer (FPGA)

Principal Design Verification Engineer - Defense - 9/80 schedule - Opportunity to advance

  • San Diego, CA +8
  • $120,000 - $200,000
  • Managed by Jobot Pro: Alexa Holz
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A bit about us:

We are a large organization working on some of the world's most advanced technology-led defense, aerospace, marine, land, and security solutions.


Why join us?

Competitive compensation
Opportunity to advance
401K
Every other Friday Off
Excellent Benefits
Medical
Dental
Vision
Tuition Reimbursement
Relocation assistance

Job Details

Required Skills and Education
  • Bachelor's Degree and 6+ years work experience (or equivalent experience)
  • Experience planning, architecting, developing, and using constrained random, self-checking test benches in System Verilog 8 plus years/UVM, OVM, and/or VHDL
  • Experience with FPGA/ASIC design and verification tools (Mentor Questa or Cadence)
  • Proven track record of managing and executing schedules, and driving tasks to closure. Candidates should also be comfortable multitasking because they may be asked to support multiple projects.
  • Strong communication and documentation skills
  • Experience developing and implementing test plans.
  • Ability to work effectively in a multi-site or borderless environment





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Job Details
Managed by Jobot Pro
Alexa Holz
Location
Litchfield, NH
Manassas, VA
Arlington, VA
Greenlawn, NY
Burlington, MA
Manchester, NH
Huntsville, AL
Austin, TX
San Diego, CA
Job Type
Permanent
Compensation
$120,000 - $200,000