Sr. Emulation Engineer

We provide cutting-edge RISC-V CPUs featuring an expandable instruction set, presented through multi-core chiplets or core IP, tailored for high-performance utilization in cloud computing, enterprise data centers, hyperscalers, 5G networks, edge computing, AI/ML, and automotive sectors.

This well-financed startup, established by seasoned industry experts, is actively recruiting skilled professionals proficient in Computer Hardware, covering disciplines such as Architecture, Logic Design, Design Verification, and Performance Analysis and Tuning.

Requirements:

Over 10 years of industry experience
Bachelor’s or Master’s degree in a relevant engineering field
Proven ability to take initiative, work independently, and collaborate across different geographic locations
Robust domain knowledge in computer architecture

Qualifications Desired:

Practical experience with commercial emulation tools such as Cadence Palladium or Mentor Veloce, and/or prototyping solutions like Cadence Protium or HAPS. This includes transactor development, virtual prototyping, and the implementation/enabling of flows for advanced verification techniques (assertions, coverage, UPF).
Proficiency in modern SystemVerilog for both design and verification
Strong software development skills in compiled languages (C/C++) and interpreted languages (Python, Tcl)
Expertise in hardware/software co-debugging
Exposure to isolating and reproducing silicon bugs in emulation
Hands-on knowledge of firmware, operating systems (Linux, RTOS), and hypervisor (Xen, KVM) open-source software stacks for both embedded and server applications
Industry experience with CPU architectures such as RISC-V, x86, armv8, coherent communication protocols, and standard IO interfaces
Clear and effective communication skills